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PCI接口的Verilog源代码-PCI connection Verilog source code
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本文件是pci的verilog源代码程序-pci the Verilog source code procedures
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基于SDRAM的PCI采集程序,PCI9054控制器+SDRAM控制器Verilog源代码,,已经SignalTap调试通过。,SDRAM PCI-based acquisition program, PCI9054 Controller+ SDRAM controller Verilog source code, has SignalTap through debugging.
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一个pci接口的硬件描述语言的实现源代码,用verilog语言实现-a pci interface hardware descr iption language source code to achieve with verilog language
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fpga开发pci的verilog,不可多得的源代码。-FPGA development pci of verilog, rare source code.
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PCI arbi verilog source code
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USB及PCI总线设计的一些源代码(经测试)-USB and PCI bus design some of the source code
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嵌入式 pci总线IP core的rtl源代码,用Verilog实现-Embedded pci bus IP core of the rtl source code, Verilog realization of
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PCI Verilog source code
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PCI总线(Slave)接口FPGA的实现代码,全部为Verilog语言源码文件,还包括测试代码,内附设计实用说明文档。-PCI Bus (Slave) interface to FPGA implementation of the code, all source code files for the Verilog language, but also test the code, included the design and practical documentation.
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基于PCI的DIO接口程序,包括verilog源程序、驱动源程序以及寄存器说明文件-PCI-DIO-based interface program, including the verilog source code, driver source code and documentation register
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Its a source code for pci board in verilog language.
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这是一个Verilog源代码写的PCI从设备参考设计。-This block is the Verilog source code for the Vantis 32 bit 33Mhz PCI Target Reference Design.
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pci 32位33M的从设备接口的实现源代码,使用verilog语言设计的,对设计自己的pci软核很有参考价值。-pci 32 位 33M slave device interface source code, using verilog language design, the design of their pci soft core of great reference value.
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